|
|
|
|
|
|
|
|
| ( 1 of 1 ) |
| United States Patent | 7,320,937 |
| Pal , et al. | January 22, 2008 |
The present invention is a reliable method of electroless-plating integrated circuit die that achieves high yield. Die are attached to a holder using a polyimide adhesive to eliminate voltage differences on bond pads which would otherwise interfere with the plating. The die are aggressively cleaned using multiple cleaning solutions, one heated to a user-defined temperature. Each cleaning is followed by an aggressive rinse in de-ionized water. Die are immersed into multiple metal solutions at user-definable temperatures. Each immersion is followed by an aggressive rinse in de-ionized water, one with heated de-ionized water.
| Inventors: | Pal; Rathindra N. (Beltsville, MD), Berlin; Kingsley R. (Odenton, MD) |
| Assignee: |
The United States of America as represented by the National Security Agency
(Washington,
DC)
N/A ( |
| Appl. No.: | 11/253,879 |
| Filed: | October 19, 2005 |
| Current U.S. Class: | 438/678 ; 257/E21.174; 257/E21.224; 257/E21.508; 438/677 |
| Current International Class: | H01L 21/44 (20060101) |
| Field of Search: | 438/678,677,614 257/E21.479,E21.224,E21.174 |
| 6028011 | February 2000 | Takase et al. |
| 6637638 | October 2003 | Farnworth et al. |
| 6759751 | July 2004 | Sinha |
| 6821909 | November 2004 | Ramanathan et al. |
| 2005/0001316 | January 2005 | Dean et al. |
| 2005/0001324 | January 2005 | Dunn et al. |
| 2005/0101130 | May 2005 | Lopatin et al. |
Jittinorasett, Suwanna; UBM Formation on Single Die/Dice for Flip Chip Applications; Thesis submitted to the Faculty of the Virginia Polytechnic Institute and State University for M.S.E.E; Aug. 29, 1999, Blacksburg, VA USA; Copyright 1999, Suwanna Jittinorasett. cited by other. |
|
|