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|United States Patent||6,324,586|
|Johnson||November 27, 2001|
A synchronized timing system is disclosed for one or more of a plurality of network interconnected computers. The system utilizes a global satellite system and includes a receiver device for detecting out-of-phase signals from a plurality of satellite sources of the satellite system. A mechanism is provided for processing and phase correlating these signals to generate a single absolute time reference signal therefrom. An interface device is disposed in each computer for receiving the reference signal and adapting this signal as the internal master clock reference for the operating system of the computer. Finally, a mechanism interconnects each computer in the network of computers to synchronize the internal master clocks of the computers to the absolute time reference signal to create a plurality of network interconnected time synchronized computers. These computers may be additionally time synchronized and interconnected to other networks of computers through a global communication system such as the global Internet.
|Inventors:||Johnson; Aric R. (Ft. Collins, CO)|
Johnson; Aric (Fort Collins, CO)
|Filed:||September 17, 1998|
|Current U.S. Class:||709/248; 342/352; 342/356|
|Current CPC Class:||G04G 7/02 (20130101); H04J 3/0638 (20130101)|
|Current International Class:||G04G 7/02 (20060101); G04G 7/00 (20060101); H04J 3/06 (20060101); G06F 015/16 ()|
|Field of Search:||;709/248 ;342/352,354,356,358,381,384,442,451,153,157 ;375/356 ;701/215 ;343/745 ;706/22,21,17|
|4882739||November 1989||Potash et al.|
|4893316||January 1990||Jane et al.|
|4893318||January 1990||Potash et al.|
|5386542||January 1995||Brann et al.|
|5701446||December 1997||Abali et al.|
|5734985||March 1998||Ito et al.|
|6160858||December 2000||Hindman et al.|
|6185205||February 2001||Sharrit et al.|
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